I have always wondered how this works (along with wire bonding), especially in an economic way.
Chips being cheap makes sense at the lithography / wafer level because sure, you can stamp out thousands of them at once. But once you need to dice them up, bond wires to them, and package them... how on earth do you do that so efficiently that each chip can be sold for fractions of a cent?
Packaging used to be a huge portion of the industry, in the 80's when pin counts exploded and litho got cheaper it was usually the most expensive part of a chip.
Today, it's cheaper mostly because of flip chips and Wafer Level Chip Scale Packaging (WLCSP). You build the bond pads as a normal litho step, and use a dielectric that's non-wettable between them. Then you can just use a mask to produce a grid of solder balls in the right places, drop the chip on them and put it in an oven. When the solder melts, the chip will self-align on it, so long as it's not too far off. It's uncanny to see it move.
Bond wires really are a thing of the past now except in niche applications or legacy chips. Flip chip designs have the die directly interface with a substrate that is then soldered to the board. With the kinds of speedy signals modern chips use, bond wires introduce impedance mismatch that degrades quality. This is related to why you don't see many new designs using pins.
Chips being cheap makes sense at the lithography / wafer level because sure, you can stamp out thousands of them at once. But once you need to dice them up, bond wires to them, and package them... how on earth do you do that so efficiently that each chip can be sold for fractions of a cent?