> multiply/accumulate for each tap in sequence. Very (!!) optimistically, that’s about 128 instructions
This is what all those vector instructions are for.
FPGA is kind of invaluable if you have lots of streams coming in at high megabit rates, though, and need to preprocess down to a rate the CPU and memory bus can handle.
Yes, indeed :) Didn’t want to muddy the waters with vector instructions, and it’s fair to say that the dedicated DSP chip market has been squeezed by FPGAs on one side and vectorised (even lightly, like the Cortex-M4/M7 DSP extension) CPUs on the other.
This is what all those vector instructions are for.
FPGA is kind of invaluable if you have lots of streams coming in at high megabit rates, though, and need to preprocess down to a rate the CPU and memory bus can handle.