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Doesn't Rosetta infringe on Intel's copyrighted instruction set and architecture of a CPU? Why Apple can use this instruction set and others cannot?

UPD: and ARM seems to be infringing as well:

> There’s a standard ARM alternate floating-point behaviour extension (FEAT_AFP) from ARMv8.7, but the M1 design predates the v8.7 standard, so Rosetta 2 uses a non-standard implementation.

> (What a coincidence – the “alternative” happens to exactly match x86.

Good luck persuading a judge that this was "a coincidence".



You can copyright code / implementation but you can't copyright the behaviour of an individual instruction!

It's very unlikely but there could conceivably be a patent, but it would have long since expired.

No case to answer.

Edit: Just to clarify - referring to treatment of one instruction here. As peer comment has said Rosetta translates ISA rather than implements so it's even further removed from being a copyright issue.


> It's very unlikely but there could conceivably be a patent, but it would have long since expired.

For those who weren't following the 32-bit to 64-bit transition on the x86 world back then, the x86-64 ISA is from the year 2000 (https://web.archive.org/web/20000817014037/http://www.x86-64...), so any patent which applies to that ISA (without the ISA being prior art for the patent) is now over 20 years old.


The x86-64 extension was made by AMD, though, not by Intel. So if at all the license would have to be obtained from AMD...

Interestingly, https://en.wikipedia.org/wiki/X86-64 says this:

> x86-64/AMD64 was solely developed by AMD. AMD holds patents on techniques used in AMD64; those patents must be licensed from AMD in order to implement AMD64


Thanks. I guess I was thinking that any patents on the instruction in the original article and of FP behaviour would predate 64-bit, but you're right that there could be relevant patents on x86-64.

Thinking aloud, I wonder if AVX 512 is translated?


AVX instructions are not supported. See here: https://medium.com/macoclock/m1-rosetta-2-limitation-illegal...


Thanks! Presumably most retail x86-64 applications will have an execution path that avoids AVX?


Intel still sells x86_64 CPUs without AVX. See Jasper Lake and Comet Lake Celeron/Pentium.


The x86 instructions are translated, not directly executed; There is no implementation of the x86 instruction set in the circuitry.


In this case AMD could also claim that they translate instructions in their CPU before execution.


Back in the 386 days Intel sued AMD for copying their microcode (which is copyrighted) not for reimplementing instructions.


And as I recall Intel lost that suit due to an old cross-licensing agreement.

In this case there would be no copying of microcode since the underlying hardware is completely different.


I think the point was that the hardware implementation is what could be infringing, it seems you are thinking the instruction set itself is?

AMD has the rights to x86, and some like transmeta did x86 translation in the chip.


The edit OP made now includes that Apple Silicon may infringe, but original wording was just Rosetta. Rosetta isn't infringing, because it's not actually implementing anything other than translation. It is possible AS is infringing on a patent, but that wasn't there originally in the post. New context changes the discussion.


These quirks appear to be over 20 years old so the patents should be expired.


Maybe they license it? Maybe they cross license things to each other?




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