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> You can't get more transistors by using a thicker wafer.

Well, you technically can, but it's not starting with a thicker wafer, it's growing a second (or more) layer of dopable silicon on top of the normal doped silicon/transistor gate insulator/wiring/more wiring/even more wiring stack of the chip, then adding another full stack on that new dopable surface. Pretty sure the fabrication infrastructure for that makes conventional, GDP-of-a-small-country photolithography fabs look cheap by comparison, though. Plus you'd be at least squaring (and probably much worse) the already not very good production yield.



Yes I'm aware of Wafer on Wafer and similar technologies, but cubic mm would still be the wrong measure. Even if you stack multiple wafers or dies on top of each other you're still restricted by surface area, not volume. (Not yet anyway - I guess there might be a future where HBM gets too tall to fit in phones but we're far away from that future.)


In your example you have limited volume, not just area. But I agree, it's not relevant for the forseeable future.


Yeah... my example of a hypothetical future that doesn't exist yet.


Oh, sorry. I misunderstood you.


Is anyone doing double sided stuff yet, besides MEMs? I would assume you could dope in interconnects, between the sides.


> I would assume you could dope in interconnects, between the sides.

Actually, you probably can't; the distance between the sides is practically astronomical compared to the horizontal feature size. I don't remeber the exact actual dimensions, but if you assume a a 1-nm trace is equivalent to a 10-meter road, then a 1-mm wafer thickness would be equivalent a 10'000-km planetary diameter, so you're getting close to the scale of routing a internet cable through the center of the earth. (At least it's not molten, I guess?) And doping generally works by diffusion, not drilling a hole.


Doesn't back illuminated CCD somewhat fit the bill? Maybe that's cheating a bit.

I naively assumed you could get an interconnect through, by taking up a large area of silicon. :)




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