> Also, the probability of just shorting exactly the right two pins is reeeeeeeaaaaaaally low
Ah, I was assuming that the "test points" were pads, not test pins. (You've opened these: are they pins?) JTAG is usually pads on most motherboards; it allows factory QA automation to prod the pads with pogo pins, while introducing a bit of setup friction in the way of doing an Evil Maid attack in the field, since there are no self-aligning pins or ports to quickly plug a cable onto.
Pads are pretty easy to bridge if whatever surface the board is facing is has electrically-conductive elements; especially if the pads don't have much separation. (Often in ruggedized embedded devices you'll see the JTAG pads specifically have been kapton'ed over by the integrator, presumably because of an anxiety about something exactly like this happening due to e.g. metal shavings getting in.)
Ah, I was assuming that the "test points" were pads, not test pins. (You've opened these: are they pins?) JTAG is usually pads on most motherboards; it allows factory QA automation to prod the pads with pogo pins, while introducing a bit of setup friction in the way of doing an Evil Maid attack in the field, since there are no self-aligning pins or ports to quickly plug a cable onto.
Pads are pretty easy to bridge if whatever surface the board is facing is has electrically-conductive elements; especially if the pads don't have much separation. (Often in ruggedized embedded devices you'll see the JTAG pads specifically have been kapton'ed over by the integrator, presumably because of an anxiety about something exactly like this happening due to e.g. metal shavings getting in.)