For RDIMM, it's fair that they don't "implement" it on memory controller because they don't sell chips made from same silicon that need support RDIMM .
Intel's "disabling" ECC is different situation. They implements ECC for the silicon, enable for Xeon, disable for Core i.
Intel's "disabling" ECC is different situation. They implements ECC for the silicon, enable for Xeon, disable for Core i.