Timing accurate: this instruction takes four cycles, so do the work, and increase master clock by four.

Cycle accurate: this instruction takes four cycles, so this push the address to the multiplexed A/D bus. Next cycle read the data. etc.

So more fast forwarding in timing vs cycle accurate. Typically timing accurate doesn't implment things like wait states injected by other peripherals accessing the main bus either.

For me it's the difference between something taking the right amount of time to the viewer vs ensuring all instructions take the same amount of cycles in the emulator as the emulatee (or at least relative to each other that is).