I wrote up a summary here: https://danglingpointers.substack.com/p/edm-an-ultra-low-lat...

Here is my summary: https://danglingpointers.substack.com/p/an-analysis-of-user-...

Regarding your conclusion, I always figured that the reason WAITPKG seems kinda lame is the only reason they ported it to Core architectures was to make the heterogenous CPUs possible. It works better on Atom. On Core it does almost nothing, as you note. AMD's ISA extension was written from the ground up for their high performance server core, which might explain why it's actually useful.

Thanks for the history lesson, that makes a lot of sense.

Here is my summary: https://danglingpointers.substack.com/p/upp-universal-predic...

Here is my summary: https://danglingpointers.substack.com/p/light-weight-cache-r...

Here is my summary: https://danglingpointers.substack.com/p/cheriot-rtos-an-os-f...

Here is my summary: https://danglingpointers.substack.com/p/the-xor-cache-a-cata...

Here is my summary: https://danglingpointers.substack.com/p/cheriot-complete-mem...

Great post, it brings back a lot of memories. Two additional factors that designers of these APIs consider are:

* GPU virtualization (e.g., the D3D residency APIs), to allow many applications to share GPU resources (e.g., HBM).

* Undefined behavior: how easy is it for applications to accidentally or intentionally take a dependency on undefined behavior? This can make it harder to translate this new API to an even newer API in the future.

Here is my summary: https://danglingpointers.substack.com/p/oasis-pooling-pcie-d...